1. Field of the Invention
The invention relates in general to a low noise amplifier (LNA), and more particularly to a broad-band gain adjustable low noise amplifier.
2. Description of the Related Art
FIG. 1 is a circuit diagram of a conventional broad-band gain adjustable low noise amplifier. Referring to FIG. 1, the low noise amplifier 100 includes a dual feedback amplifier 110, a shunt-shunt feedback amplifier 120 and a gain control unit 130. The dual feedback amplifier 110 has a Kukeilka structure and includes n-type metal oxide semiconductor (NMOS) transistors M1, M2 and Mf1. The gate of the transistor M1 is for receiving a radio-frequency input signal RF_IN and the drain of the transistor M1 is coupled to an operational voltage Vdd, such as 1.8V, via a resistor R1. The gate of the transistor M2 is coupled to the drain of the transistor M1, and the drain of the transistor M2 is coupled to the operational voltage Vdd via a resistor R2 for outputting a first output signal S1. The gate and drain of the transistor Mf1 are commonly coupled to the source of the transistor M2, and coupled to the gate of the transistor M1 via a resistor Rf1. Moreover, a resistor Rf2 is coupled between the gate and drain of the transistor M2 for adjusting the output impedance and thus the gain and linearity of the dual feedback amplifier 110. The drain of the transistor M2 is coupled to a capacitor Cb1 such that the output direct-current (DC) voltage of the transistor M2 has no influence on the bias condition of the shunt-shunt feedback amplifier 120 at the next-stage.
The shunt-shunt feedback amplifier 120 includes a NMOS transistor M3 having its gate coupled to the drain of the transistor M2 via the capacitor Cb1 for receiving the first output signal S1. The transistor M3 is for outputting a radio-frequency output signal RF_OUT at its drain. The drain of the transistor M3 is coupled to the voltage Vdd via a resistor R3 and a resistor Rf3 is coupled between the gate and drain of the transistor M3. Moreover, the gain control unit 130 includes a DC power source Vctrl and a NMOS transistor Mc1. The drain of the transistor Mc1 is coupled to the gate of the transistor M3, and the DC power source Vctrl is coupled to the gate of the transistor Mc1 via resistor Rc1 for adjusting the resistance of the transistor Mc1, wherein the DC power source Vctrl supplies a DC voltage 0˜Vdd (1.88V).
Ordinarily when the input signal RF-IN is small, the DC power source Vctrl of the gain control unit 130 adjusts the supplied DC voltage such that the dual feedback amplifier 110 and the shunt-shunt feedback amplifier 120 can operate in a normal operational region (or high gain mode) to achieve the required gain for the low noise amplifier 100. When the input signal RF_IN become large, in order to avoid the saturation of the low noise amplifier 100, the output voltage of the DC power source Vctrl will usually be increased (near 1.8V) to switch the operation mode of the low noise amplifier 100 to a low gain mode. However, in the low gain mode, the linearity of the lower noise amplifier 100 is not good enough, and thus the low noise amplifier 100 cannot increase its tolerance to large input signals.